Reduction in characteristic deviations due to parasitic elements on continuous-time filters using integrators

Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii

Research output: Contribution to journalArticle


The integrator configuration is a filter configuration method involving realization of operational function of each edge by the functional circuits of an integrated circuit based on the signal flow graph with the desired frequency characteristics, and can realize an arbitrary linear time-invariant continuous time system filter. In this paper, a design procedure is proposed for a filter with an integrator configuration in which the frequency deviation is small even if the frequency characteristic of the functional circuit deviates from the ideal one due to the parasitic elements in the circuit. In general, when the integration edge has a feedback edge to return its output to its own input in the signal flow graph, the integration edge and the feedback edge can be realized with ideal lossy integrators on the integrated circuit. Hence, there is a degree of freedom in realization of the integration edge with feedback to itself. In the proposed method, this degree of freedom is fully utilized to reduce the frequency deviation. The equation to evaluate the characteristic deviation by the parasitic elements is derived, and the parameter to express the degree of freedom is determined such that this deviation is reduced. As an application example, a third-order Bessel filter is designed. Its numerical simulation is used for confirming the effectiveness of the proposed method.


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