This paper proposes programmable architectures and design methods for numeric function generators (NFGs) of two-variable functions. To realize a twovariable function in hardware, we partition a given domain of the function into segments, and approximate the function by a polynomial in each segment. This paper introduces two planar segmentation algorithms that efficiently partition a domain of a two-variable function. This paper also introduces a design method for symmetric two-variable functions (i.e. f(X, Y) = f(Y, X)). This method can reduce the memory size needed for symmetric functions by nearly half with small speed penalty. The proposed architectures allow a systematic design of various two-variable functions. We compare our approach with one based on a one-variable NFG. FPGA implementation results show that, for a complicated function, our NFG achieves 57% of memory size and 60% of delay time of a circuit designed based on a one-variable NFG.
|Number of pages||12|
|Journal||IPSJ Transactions on System LSI Design Methodology|
|Publication status||Published - 1 Dec 2010|