Paper a 0.8-V syllabic-companding log domain filter with 78-dR dynamic range in 0.35-μm CMOS

Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokorot

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Abstract

A scheme for a low-voltage CMOS syllabic-companding log domain filter with wide dynamic range is proposed and its prototype is presented. A nodal voltage which is fixed in a conventional filter based on the dynamically adjustable biasing (DAB) technique is adapted for change of input envelope to achieve wide dynamic range. Externally linear and time invariant (ELTI) relation between an input and an output is guaranteed by a state variable correction (SVC) circuit which is also proposed for low-voltage operation. To demonstrate the proposed scheme, a fifth-order Chebychev low-pass filter with l00-kHz cutoff frequency is designed and fabricated in a standard 0.35-μm CMOS process. The filter has a 78-dB dynamic range and consumes 200-μW power from a 0.8-V power supply. .

Original languageEnglish
Pages (from-to)87-95
Number of pages9
JournalIEICE Transactions on Electronics
VolumeE91-C
Issue number1
DOIs
Publication statusPublished - 1 Jan 2008

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Keywords

  • Analog filter syllabic companding technique
  • Dynamically adjustable biasing technique
  • Log domain
  • Low-supply voltage

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