Novel area-efficient MOSFET-C filter design methodology

Shigetaka Takagi, Kazuyuki Wada, Nobuo Fujii, Mohammed Ismail, Dong Yong Kim

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Abstract

This paper proposes a novel area-efficient and cost-effective design methodology for MOSFET-C continuous-time filters. The new methodology reduces the number of MOS transistors used in the previously reported work[5] by almost a factor of two. A third-order leapfrog low-pass Chebyschev filter is realized and simulated as an example to demonstrate the validity of the new design methodology.

Original languageEnglish
Pages53-56
Number of pages4
Publication statusPublished - 1 Dec 1996
EventProceedings of the 1996 IEEE Asia Pacific Conference on Circuits and Systems - Seoul, South Korea
Duration: 18 Nov 199621 Nov 1996

Conference

ConferenceProceedings of the 1996 IEEE Asia Pacific Conference on Circuits and Systems
CitySeoul, South Korea
Period18/11/9621/11/96

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  • Cite this

    Takagi, S., Wada, K., Fujii, N., Ismail, M., & Kim, D. Y. (1996). Novel area-efficient MOSFET-C filter design methodology. 53-56. Paper presented at Proceedings of the 1996 IEEE Asia Pacific Conference on Circuits and Systems, Seoul, South Korea, .