Logic gate threshold voltage controllable single metal gate FinFET CMOS inverters implemented by using co-integration of 3T/4T-FinFETs

Y. X. Liu, T. Sekigawa, T. Hayashida, T. Matsukawa, K. Endo, S. O'Uchi, K. Sakamoto, K. Ishii, T. Tsukada, Y. Ishikawa, H. Yamauchi, Atusi Ogura, H. Koike, E. Suzuki, M. Masahara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)
Original languageEnglish
Title of host publication2008 IEEE International SOI Conference Proceedings
Pages161-162
Number of pages2
DOIs
Publication statusPublished - 24 Dec 2008
Event2008 IEEE International SOI Conference - New Paltz, NY, United States
Duration: 6 Oct 20089 Oct 2008

Publication series

NameProceedings - IEEE International SOI Conference
ISSN (Print)1078-621X

Conference

Conference2008 IEEE International SOI Conference
CountryUnited States
CityNew Paltz, NY
Period6/10/089/10/08

Cite this

Liu, Y. X., Sekigawa, T., Hayashida, T., Matsukawa, T., Endo, K., O'Uchi, S., ... Masahara, M. (2008). Logic gate threshold voltage controllable single metal gate FinFET CMOS inverters implemented by using co-integration of 3T/4T-FinFETs. In 2008 IEEE International SOI Conference Proceedings (pp. 161-162). [4656344] (Proceedings - IEEE International SOI Conference). https://doi.org/10.1109/SOI.2008.4656344