Influence of fin height on poly-Si/PVD-TiN stacked gate FinFET performance

T. Hayashida, K. Endo, Y. X. Liu, S. O'uchi, T. Matsukawa, W. Mizubayashi, S. Migita, Y. Morita, H. Ota, H. Hashiguchi, D. Kosemura, T. Kamei, J. Tsukada, Y. Ishikawa, H. Yamauchi, Atusi Ogura, M. Masahara

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We experimentally investigated the device performance of n +- poly-Si/PVD-TiN stacked gate FinFETs with different H fin's. It was found that mobility enhances in the tall H fin devices due to the increased tensile stress. However, as L g decreases, I on for tall H fin case becomes worse probably due to high R sp. It was also confirmed that V th variation increases with increasing H fin due to the rough etcing of fin sidewall.

Original languageEnglish
Title of host publicationIEEE International SOI Conference, SOI 2011
DOIs
Publication statusPublished - 20 Dec 2011
Event2011 IEEE International SOI Conference, SOI 2011 - Tempe, AZ, United States
Duration: 3 Oct 20116 Oct 2011

Publication series

NameProceedings - IEEE International SOI Conference
ISSN (Print)1078-621X

Conference

Conference2011 IEEE International SOI Conference, SOI 2011
CountryUnited States
CityTempe, AZ
Period3/10/116/10/11

Cite this

Hayashida, T., Endo, K., Liu, Y. X., O'uchi, S., Matsukawa, T., Mizubayashi, W., ... Masahara, M. (2011). Influence of fin height on poly-Si/PVD-TiN stacked gate FinFET performance. In IEEE International SOI Conference, SOI 2011 [6081800] (Proceedings - IEEE International SOI Conference). https://doi.org/10.1109/SOI.2011.6081800