### Abstract

This paper presents a design method of easily testable AND-EXOR networks. It is an improvement of Reddy and Saluja-Reddy's methods, and has the following features: 1) The network uses generalized Reed-Muller expressions (GRMs) instead of Positive Polarity Reed-Muller expressions (PPRMs). The average number of products for GRMs is less than half of that for PPRMs, and is less than that of sum-of-products expressions (SOPs). 2) The network consists of a literal part, an AND part, an EXOR part, and a check part. 3) The EXOR part can be a tree instead of a cascade. Thus, the network is faster. 4) The test detects multiple stuck at faults under the assumption that the faults occur at most one part, either the literal part, the AND part, the EXOR part, or the check part.

Original language | English |
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Pages (from-to) | 709-716 |

Number of pages | 8 |

Journal | IEEE Transactions on Computers |

Volume | 46 |

Issue number | 6 |

DOIs | |

Publication status | Published - 1 Dec 1997 |

### Keywords

- AND-EXOR
- Circuit complexity
- Linear circuit
- Logic minimization
- Reed-Muller expression
- Testable design

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## Cite this

*IEEE Transactions on Computers*,

*46*(6), 709-716. https://doi.org/10.1109/12.600830