Approach of diagnosing single bridging faults in CMOS combinational circuits

Koji Yamazaki, Teruhiko Yamada

Research output: Contribution to journalConference article

3 Citations (Scopus)

Abstract

An approach of diagnosing single bridging faults in CMOS combinational circuits is proposed. In this approach, the cause of an error observed at the primary outputs is deduced using a diagnosis table constructed from the circuit under test and the given tests. The size of a diagnosis table is proportional to [the number of gates]x[the number of tests], which is much smaller than that of the fault dictionary. The experimental results show that the CPU time is nearly proportional to the size of the circuit and the resolutions for most faults are less than 100, when using the tests to detect single stuck-at faults.

Original languageEnglish
Pages (from-to)88-93
Number of pages6
JournalProceedings of the Asian Test Symposium
Publication statusPublished - 1 Dec 1994
EventProceedings of the 3rd Asian Test Symposium - Nara, Jpn
Duration: 15 Nov 199417 Nov 1994

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