A diagnostic fault simulation method for a single universal logical fault model

Toshinori Hosokawa, Hideyuki Takano, Hiroshi Yamazaki, Koji Yamazaki

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Fault diagnosis methods for specified fault models might deduce wrong faults as suspicious candidate faults (misprediction). The methods might not be able to also deduce suspicious candidate faults (non-prediction). In this paper, a fault diagnosis method for a single universal logical fault model in scan testing is proposed. In the fault diagnosis method, a diagnostic fault simulation for a single universal logical fault model is used. The number of mispredictions, the number of non-predictions, the number of suspicious candidate faults, and fault diagnosis time are evaluated compared with a fault diagnosis method for a single stuck-at fault model. Experimental results show the effectiveness of our proposed method.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE 22nd Pacific Rim International Symposium on Dependable Computing, PRDC 2017
EditorsMasato Kitakami, Dong Seong Kim, Vijay Varadharajan
PublisherIEEE Computer Society
Pages217-218
Number of pages2
ISBN (Electronic)9781509056514
DOIs
Publication statusPublished - 5 May 2017
Event22nd IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2017 - Christchurch, New Zealand
Duration: 22 Jan 201725 Jan 2017

Publication series

NameProceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC
ISSN (Print)1541-0110

Conference

Conference22nd IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2017
CountryNew Zealand
CityChristchurch
Period22/01/1725/01/17

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Keywords

  • Diagnostic fault simulation
  • Fault diagnosis
  • Multicycle capture testing
  • Universal logical fault model

Cite this

Hosokawa, T., Takano, H., Yamazaki, H., & Yamazaki, K. (2017). A diagnostic fault simulation method for a single universal logical fault model. In M. Kitakami, D. S. Kim, & V. Varadharajan (Eds.), Proceedings - 2017 IEEE 22nd Pacific Rim International Symposium on Dependable Computing, PRDC 2017 (pp. 217-218). [7920618] (Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC). IEEE Computer Society. https://doi.org/10.1109/PRDC.2017.38